RISC-V Datapath Simulator
Type one RISC-V instruction and highlight the exact wires, components and control signals it uses in the single-cycle datapath.
1. Build the datapath for
Hardware for: R-type arithmetic, I-type load, S-type store, SB-type branch. Try two or three instructions to see how the datapath grows.
2. Run an instruction
Formats: R-type arithmetic: rd, rs1, rs2 · I-type load: rd, offset(rs1) · S-type store: rs2, offset(rs1) · SB-type branch: rs1, rs2, offset. Registers can be x0–x31 or ABI names (a0, t1…).
Details
Point at (or tap) any part or wire of the datapath to see what it does and, after running an instruction, the value it carries.
Instruction
Run an instruction to see its 32 bits split into fields.
Control signals
| Signal | R arithmetic | I load | S store | SB branch |
|---|---|---|---|---|
| RegWrite | 1 | 1 | 0 | 0 |
| ALUSrc | 0 | 1 | 1 | 0 |
| ALUOp | 10 | 00 | 00 | 01 |
| MemRead | 0 | 1 | 0 | 0 |
| MemWrite | 0 | 0 | 1 | 0 |
| MemtoReg | 0 | 1 | X | X |
| Branch | 0 | 0 | 0 | 1 |
Only signals this datapath needs are listed. Hover a row for its meaning; X = does not matter.
What happens in this cycle
Run an instruction to see each stage explained with its real values.
Registers
Click a value to edit it. Read and written registers are marked.
Data memory
256 bytes as 8-byte doublewords (little-endian). Click a value to edit it.
About This Simulation
This RISC-V datapath simulator lets you choose which instructions the datapath must support, then run one. Every wire, component and control signal the instruction uses lights up, and registers and data memory keep their values between instructions.
Features
- R-type, I-type, load, store, branch and jump instructions
- Active wires and components highlighted in the single-cycle datapath
- Control signal values (RegWrite, ALUSrc, MemRead, MemWrite, MemtoReg, Branch, ALUOp)
- Register file and data memory state kept between runs
- Choose which instructions the datapath supports
Topics covered
- RISC-V
- Single-Cycle Datapath
- Control Unit and Control Signals
- ALU
- Register File
- Instruction Formats
Explanation
A datapath is the hardware that executes instructions: the program counter, instruction memory, register file, ALU, data memory and the multiplexers that connect them. In a single-cycle datapath every instruction finishes in one clock cycle, and the control unit sets the signals that decide which paths are used.
How it works
- Fetch: the PC addresses instruction memory, and PC + 4 is computed for the next instruction.
- Decode: the opcode goes to the control unit, the register fields read rs1 and rs2, and the immediate generator builds the immediate.
- Execute: the ALU adds, subtracts, compares or computes an address, with ALUSrc choosing between rs2 and the immediate.
- Memory: loads read data memory (MemRead) and stores write it (MemWrite).
- Write back: MemtoReg chooses the ALU result or loaded data to write to rd when RegWrite is 1. For branches, the PC becomes PC + offset if the condition holds.
Why it matters
Understanding the datapath explains how software becomes hardware actions, why some instructions are slower, and how pipelining works. Tracing control signals for a given instruction is a standard question in computer architecture courses such as CSE340.
Frequently Asked Questions
What are the control signals in a RISC-V single-cycle datapath?
The main ones are RegWrite, ALUSrc, MemRead, MemWrite, MemtoReg, Branch and ALUOp. They choose which multiplexer inputs are used, whether registers or memory are written, and which ALU operation is performed.
Which components does a load (lw) instruction use?
All five stages: instruction memory, register file (read rs1), immediate generator, ALU (address = rs1 + offset), data memory (read) and the register file again (write rd). That makes it the longest path in the single-cycle datapath.
Why is a single-cycle datapath inefficient?
The clock period must fit the slowest instruction (usually a load), so faster instructions waste time. Pipelining fixes this by overlapping the stages of several instructions.
What does ALUSrc do?
It controls the multiplexer in front of the ALU's second input: 0 selects register rs2 (R-type and branches) and 1 selects the immediate (I-type, loads and stores).