Subtopic Notes

4.1 Central Processing Unit Architecture

4. Processor Fundamentals

Central Processing Unit (CPU): Processes instructions and data that are input into the computer so that the result can be output

Microprocessor: A type of integrated circuit on a single chip

Von Neumann Machine

  • Data and programs are indistinguishable, allowing them to share the same memory
  • Operates with a single processor which rely on registers
  • Follows a linear sequence of fetch, decode, and execute operations for processing instruction

Registers: Smallest unit of storage within the CPU used to hold data or instructions temporarily during processing. Registers are of two types

  • General purpose registers
    • Holds data temporarily within the microprocessors
    • Assembly language instructions can use it
  • Special purpose registers
    • Dedicated for certain functions like CPU operation and interrupt
    • Holds either address or data but not both
    • Some are accessible by assembly language instructions
    • Includes: PC, MDR, MAR, ACC, IX, CIR, Status Register

CPU Components

Units

  • Arithmetic Logic Unit (ALU): Carries out arithmetic calculations & logical decisions
  • Control Unit (CU): Controls the operation of the memory, processor and input/output devices by using the fetch-decode-execute cycle
  • Immediate Access Store (IAS): A memory unit that the processor accesses directly. For example when typing, the keys are stored here for processing
  • System Clock: A timing device connected to the processor that synchronizes the execution of the fetch-execute cycle

Registers

  • Program Counter (PC): Holds the memory address of next instruction to be executed
  • Memory Address Register (MAR): holds the address from which data will be fetched or to which data will be sent.
  • Memory Data Register (MDR): Temporarily stores data that is being transferred to CIR by the MAR.
  • Current Instruction Register (CIR): Holds the instruction currently being executed by the CPU
  • Accumulator (ACC): Stores intermediate arithmetic and logic results during processing
  • Index Register (IX): Holds an index value to modify addresses for efficient data access in memory, especially in array processing and loops
  • Status Register: Holds flags indicating the outcome of operations, such as zero, carry, overflow, error, comparisons, or negative
  • Interrupt Register: A special register in the CPU

Buses

A set of parallel wires that connects multiple components and facilitate communication among them

  • Address Bus: Unidirectional bus that carries memory addresses from the CPU to other memory, input or output locations.
  • Data Bus: Bidirectional bus that carries data between the CPU, memory, and other peripherals.
  • Control Bus: Bidirectional bus that transmits control signals from the CPU to coordinate and manage the operations of various components.

The Fetch-Decode-Execute Cycle

Fetch Stage

  • The Program Counter (PC) holds the address of the next instruction to be fetched from main memory.

  • The address stored in the PC is copied to the Memory Address Register (MAR) using the address bus.
    MAR ← [PC]

  • The address in MAR is sent to main memory through the address bus.

  • The Control Unit (CU) sends a read signal through the control bus to tell main memory to read from that address.

  • The instruction stored at the address in MAR is copied from main memory to the Memory Data Register (MDR) using the data bus.
    MDR ← [[MAR]]

  • The instruction in MDR is copied to the Current Instruction Register (CIR).
    CIR ← [MDR]

  • The Program Counter (PC) is incremented so that it points to the next instruction.
    PC ← [PC] + 1

Decode Stage

  • The CU works out what is required from the instruction
  • Instruction is of two parts:
    • Opcode - What the instruction is
    • Operand - Data or addresses required to complete the instruction

Execute Stage

  • CPU will carry out the decoded instruction
    • ALU: Performs the calculation
    • CU: Coordinates with the appropriate components to store data or results back into main memory or retrieves data from a different memory location

Key Points

  • This process cycles which happens billions of times per second
  • [ ] denote value currently in that register
  • [[ ]] means the CPU must do a logical operation then copy this value

Performance of Computer System Factors

Bus Width

  • Determines the number of bits that can be simultaneously transferred
  • Increasing width increases data transfer rate

Clock speed

  • Determine the clock cycle that synchronizes all computer operations
  • Increasing clock speed increases the number of operations per second
  • This doesn’t necessarily lead to better performance
  • Overclocking: Using a higher clock speed than designed. This may lead to operations becoming unsynchronized (causing crashes) or cause overheating of CPU

Cache

  • Small, high-speed memory
  • Stores frequently accessed data and instructions
  • Located inside the CPU
  • Larger cache memory size leads to better CPU performance

Number of Cores

  • Most CPU chips are multi-core
  • Each core processes different instructions using multithreading
  • Higher core number improves performance

Ports

  • Hardware connecting CPU and a peripheral device which cannot be directly connected to CPU
  • Universal Serial Bus (USB): Connects input and output devices to the processor
    • A voltage change occurs when the drive is plugged in
    • The computer detects the change
    • The code of the device is transferred to the computer
    • The OS finds the code of the device in the list of devices and loads the appropriate device driver
  • High Definition Multimedia Interface (HDMI)
    • Transmits high-quality audio and video signals between devices
    • Connects to output devices like LCD and LED screens
  • Video Graphics Array (VGA)
    • Allows only video transmission
    • Outdated technology
    • Connects to output device like monitor

Interrupts

  • Purpose
    • Used to attend to certain tasks/issues
    • Used to make sure that vital tasks are dealt with immediately
    • A signal telling the CPU that its attention is required
    • Enables multi-tasking
  • Operation
    • CPU checks the interrupt register after each F-D-E cycle
    • If flag is true in interrupt register, interrupt source is detected
    • If priority is low, it is ignored
    • If it is high priority
      • Contents of registers in CPU are stored in stack
      • PC is loaded with Interrupt Service Routine (ISR)
      • ISR executed
      • CPU restores the registers’ contents,
      • Old program continues
      • Interrupts are again re-enabled
      • F-D-E cycle begins again
  • Examples
    • A hardware interrupt - Paper jam in a printer, Pressing a key, moving mouse
    • A software error – File not found, division by zero, two processes trying to access the same memory location

Instruction Set: List of all the commands that can be processed by a CPU, and the commands are machine code